AHMED, S.; NASEEM, M. Efficient AES-XTS Pipelined Implementation on FPGA. Sir Syed University Research Journal of Engineering & Technology, Pakistan, v. 4, n. 1, p. 6, 2014. DOI: 10.33317/ssurj.56. Disponível em: https://sirsyeduniversity.edu.pk/ssurj/rj/index.php/ssurj/article/view/56. Acesso em: 19 may. 2024.